1. Field of the Invention
The invention analyzes VLSI chips for defects.
2. Description of the Prior Art
The use of electron-beam, ion-beam, and laser-beam probing technologies as a means of verifying behavior in microelectronic devices is gaining acceptance. Generally, these techniques compare strobescopic images extracted from faulty and good devices using image subtraction techniques as reported by Oxford and Propst. [W. V. Oxford and R. H. Propst, "Efficient Computer-Aided Failure Analysis of Integrated Circuits using Scanning Electron Microscopy", IEEE Transactions on Reliability, Vol. R-34, No. 5, December 1985, pp. 410-417]. Another comparative technique utilizes the comparison of logic state maps extracted from the faulty device and compared to the expected, generated by logic simulation techniques, as reported by Kuiji, Tamama, and Nagatani. [N. Kuiji, T. Tamama and M. Nagatani, "FINDER: A CAD System-Based Electron Beam Tester for Fault Diagnosis of VLSI Circuits", IEEE Transactions on Computer-Aided Design, Vol. CAD-5, No. 2, April 1986, pp 313-319]. However, the development of a sequence of images from a specimen operating at high speed takes considerable time (hours) and includes large amounts of redundant and useless data.
Recently, Concina and Richardson discussed a diagnostic methodology which is based on comparison of simulated and measured images and nodal waveforms. [S. Concina and N. Richardson, "Workstation-Driven E-Beam Prober", Proceedings of the IEEE International Test Conference, Washington, D.C., Sept. 1-3, 1987, pp 554-560]. Some of the algorithms and data structures used by this system is discussed by Concina and Liu and are based on mask layer oriented design information [S. Concina and G. S. Liu, "Integrating Design Information for IC Diagnosis", Proceedings of the IEEE 24th Design Automation Conference, Miami Beach, Fla., pp 251-257]. This system incorporates electron beam probing apparatus as an integral part of a workstation computer.